Power supply noise has been a long-standing threat to the normal functioning of the microprocessor in the form of voltage emergence. The state-of-the-art commercial chips detect such emergencies by placing limited number of noise sensors on the chip. Current sensor-based solutions either suffer from limited usable sensors or do not work well when the power delivery network (PDN) loads have large nonlinearity. In this paper, we propose a graph representation learning methodology based on graph attention networks to represent the grid-like structure of the PDN and develop a novel method to predict the noises in hotspot regions based on the limited on-chip sensors. Results show that our proposed method can outperform the prior approaches (based on linear regression and multi-layer perception models) by reducing at least 20.14% of mean absolute error and 20.02% of maximum absolute error on average.